Technical Field
This disclosure is directed to integrated circuits, and more particularly, to providing debug access to integrated circuits.
Description of the Related Art
Boundary scan testing was originally developed to test connections between integrated circuits (IC's) and printed circuit boards (PCB's) in the absence of other ways to probe them. Boundary scan is based on the Joint Test Action Group (JTAG) specification, which is also known as the Institute of Electrical and Electronic Engineers (IEEE) Standard 1149.1. In particular, the IEEE 1149.1 standard provided a mechanism for providing access to pins of an IC to determine the presence of proper connections.
Although the IEEE 1149.1 standard was originally developed for boundary scan, its uses have expanded to other areas. For example, JTAG ports are now used to obtain access to an IC for debugging during the development phase. For example, a JTAG controller may be used to access portions of an IC while conducting tests of system software in a new design.
Since some IC's have limited pin counts that can be devoted to supporting test and debug, the serial wire debug (SWD) interface has been developed. The SWD interface is an interface that utilizes only two pins but nevertheless provides access to internal debug interface blocks. Despite the lower pin count, the SWD interface may provide equivalent functionality to higher pin count JTAG interfaces.